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ISL29011
Electrical Specifications
specified. (Continued)
V SUP(VDDD,VDDA) = 3V, T A = +25°C, R EXT = 499k ? 1% tolerance, 16-bit ADC operation, unless otherwise
MIN
MAX
PARAMETER
I INT
I IRDR1
I IRDR2
I IRDR3
I IRDR4
V IRLED
t r
t f
f IRLED1
f IRLED2
I SUP (IRLED1)
I SUP (IRLED2)
DESCRIPTION
INT Current Sinking Capability
IRDR Source Current
IRDR Source Current
IRDR Source Current
IRDR Source Current
Voltage Head Room of IRDR Pin
Rise Time for IRDR Source Current
Fall Time for IRDR Source Current
IR LED Modulation Frequency
IR LED Modulation Frequency
Supply Current of Proximity Sensing
Supply Current of Proximity Sensing
CONDITION
IS<1:0> = 0
15 ? at IRDR pin
(Note 8)
IS<1:0> = 1
(Note 8)
IS<1:0> = 2
(Note 8)
IS<1:0> = 3
(Note 8)
IRDR = 90mA, IS<1:0> = 0 (Note 8)
R LOAD = 15 ? at IRDR pin, 20% to 80%
R LOAD = 15 ? at IRDR pin, 80% to 20%
Freq = 0 (Note 8)
Freq = 1 (Note 8)
IS<1:0> = 0, Freq = 0 (Note 8)
IS<1:0> = 0, Freq = 1 (Note 8)
(Note 9)
4
44
TYP
5
100
50
25
12.5
V DD - 1.0
35
10
DC
360
101
51
(Note 9)
58
UNIT
mA
mA
mA
mA
mA
V
ns
ns
kHz
kHz
mA
mA
Duty Cycle
Duty Cycle of IR LED Modulation
50
%
PROX-IR
PROX
Differential ADC Output of IR and
Proximity Sensing With Object Far Away
IR and proximity sensing with Range 2 and
Scheme 0; 15 ? @ IRDR pin, IS<1:0> = 0,
1.0
%
to Provide No Reflection
Freq = 0; E = 210 lux, Sunlight.
NOTES:
5. V SUP is the common voltage to V DDD and V DDA.
6. 550nm green LED is used in production test. The 550nm LED irradiance is calibrated to produce the same DATA count against an illuminance level
of 300 lux fluorescent light.
7. 850nm infrared LED is used in production test. The 850nm LED irradiance is calibrated to produce the same DATA_IR count against an illuminance
level of 210 lux sunlight at sea level.
8. See “Register Set” on page 10.
I 2 C Electrical Specifications
tolerance, 16-bit ADC operation.
For SCL and SDA unless otherwise noted, V SUP(VDDD,VDDA) = 3V, T A = +25°C, R EXT = 499k ? 1%
MIN
MAX
V I C
PARAMETER
2
DESCRIPTION
Supply Voltage Range for I 2 C Interface
CONDITION
(Note 9)
1.7
TYP
(Note 9)
3.63
UNIT
V
f SCL
V IL
V IH
V hys
V OL
SCL Clock Frequency
SCL and SDA Input Low Voltage
SCL and SDA Input High Voltage
Hysteresis of Schmitt Trigger Input
Low-Level Output Voltage (Open-drain) at
4mA Sink Current
1.25
0.05V DD
400
0.55
0.4
kHz
V
V
V
V
I i
t SP
t AA
Input Leakage for Each SDA, SCL Pin
Pulse Width of Spikes that must be
Suppressed by the Input Filter
SCL Falling Edge to SDA Output Data Valid
-10
10
50
900
μA
ns
ns
5
FN6467.5
October 10, 2012
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